Siêu Thị Máy Chủ » RAM máy chủ » DDR3 ECC REG. VLP 8GB DDR3-1333MHz ECC Registered VLP DIMMs PC3-10600 (Code Name: 8G-ECC-REG-1333-WT)

Support Intel Xeon Processor 5600/5500 Series-based Blade Servers

chỉ còn 2,046,000 VNĐ

Chi tiết

Description This DDR3 VLP (Very Low Profile) registered Dual In-Line Memory Module (DIMM) series consists of 2Gb A gen-eration. These are intended for use as main memory in server and workstation systems, providing a high performance 8 byte interface in 133.35mm width form factor of industry standard. It is suitable for easy interchange and addition. Features VDD=VDDQ=1.5V VDDSPD=3.3V to 3.6V Fully differential clock inputs (CK, /CK) operation Differential Data Strobe (DQS, /DQS) On chip DLL align DQ, DQS and /DQS transition with CK transition DM masks write data-in at the both rising and falling edges of the data strobe All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock Programmable CAS latency 5, 6, 7, 8, 9, 10, and (11)supported Programmable additive latency 0, CL-1, and CL-2 supported Programmable CAS Write latency (CWL) = 5, 6, 7, 8 Programmable burst length 4/8 with both nibble sequential and interleave mode BL switch on the fly 8banks 8K refresh cycles /64ms DDR3 SDRAM Package: JEDEC standard 78ball FBGA(x4/x8) with support balls Driver strength selected by EMRS Dynamic On Die Termination supported Asynchronous RESET pin supported ZQ calibration supported TDQS (Termination Data Strobe) supported (x8 only) Write Levelization supported Auto Self Refresh supported 8 bit pre-fetch SPD with Integrated TS of Class B This product is in compliance with the directive pertaining of RoHS. STT Nhà cung cấp Liên hệ Tiền/Mua 1 Công Ty TNHH Siêu Siêu Nhỏ Địa chỉ chính: 254A Nguyễn Đình Chiểu - phường 6 - Quận 3 - Tp.Hồ Chí Minh Địa chỉ 1: 57 Láng Hạ - Thành Công Tower P. 1002, Ba Đình, HN   1,948,500 VNĐ Description This DDR3 VLP (Very Low Profile) registered Dual In-Line Memory Module (DIMM) series consists of 2Gb A gen-eration. These are intended for use as main memory in server and workstation systems, providing a high performance 8 byte interface in 133.35mm width form factor of industry standard. It is suitable for easy interchange and addition. Features VDD=VDDQ=1.5V VDDSPD=3.3V to 3.6V Fully differential clock inputs (CK, /CK) operation Differential Data Strobe (DQS, /DQS) On chip DLL align DQ, DQS and /DQS transition with CK transition DM masks write data-in at the both rising and falling edges of the data strobe All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock Programmable CAS latency 5, 6, 7, 8, 9, 10, and (11)supported Programmable additive latency 0, CL-1, and CL-2 supported Programmable CAS Write latency (CWL) = 5, 6, 7, 8 Programmable burst length 4/8 with both nibble sequential and interleave mode BL switch on the fly 8banks 8K refresh cycles /64ms DDR3 SDRAM Package: JEDEC standard 78ball FBGA(x4/x8) with support balls Driver strength selected by EMRS Dynamic On Die Termination supported Asynchronous RESET pin supported ZQ calibration supported TDQS (Termination Data Strobe) supported (x8 only) Write Levelization supported Auto Self Refresh supported 8 bit pre-fetch SPD with Integrated TS of Class B This product is in compliance with the directive pertaining of RoHS.